The invention relates to the use of a method for the manufacture of an electric thin film circuit according to the Muenz et al U.S. Pat. No. 4,200,502 issued Apr. 29, 1980 incorporated herein by reference for the manufacture of conductor crossovers with TaAl/SiO.sub.2 capacitors having as low a capacitance as possible.
The above noted patent application relates to a method for the manufacture of an electric thin layer circuit which comprises at least one capacitor and a conductor and/or resistance. In order to form these circuit elements on an insulating substrate, first a layer of a tantalum-aluminum alloy with a tantalum fraction of between 30 and 70 gram-atomic %, and subsequently an additional layer of a tantalum-aluminum alloy with a tantalum fraction on the order of magnitude between 2 and 20 gram-atomic % are applied. Then, by means of a first mask and etching technique, at the location of a capacitor to be formed, an interruption in both tantalum-aluminum layers is introduced. In order to produce a two-layer capacitor-dielectric, the tantalum-aluminum layers in the capacitor region are anodically oxidized and a silicon-dioxide layer is applied on the resulting tantalum-aluminum oxide layer. In a second masking and etching technique areas of the two-layer capacitor dielectric not required are removed as well as the tantalum-aluminium layer with the lower tantalum fraction. Finally, by means of an additional mask and etching technique, an electrically highly conductive surface layer is produced on the capacitor-dielectric such as in the region of conductors.
The problem solved in the above noted patent application is in disclosing for electric thin layer circuits a means for further reduction in the total number of masks required for the manufacture of the thin layer circuits. The solution according to the above mentioned patent application is that in a method of the type described in the introduction, with the aid of the first mask and etching technique, additionally the regions of both tantalum-aluminum layers lying outside the circuit element regions are etched away. Then the exposed surfaces of the tantalum-aluminum layers are anodically oxidized over the entire surface and covered with the silicon-dioxide layer applied over the entire surface. The regions of the silicon-dioxide layer which are not required are removed with the aid of a second mask and etching technique. The regions of the tantalum-aluminum-oxide layer and the tantalum-aluminum layer with a low tantalum concentration which are not needed are selectively etched off by utilizing the remaining silicon-dioxide layer as the etching mask. Subsequently, the surface layer is applied.
For the completion of the electric circuits with the aid of the thin film technique, installation locations for hybrid components are most often provided which are connected in separate working steps with the thin film circuit. For economic reasons, an optimum surface use of the thin film circuit is always strived for. Its dimensions are essentially determined by technologically-conditioned properties (surface resistance, surface capacitance) and by the wiring of the thin film components with one another necessary for this circuit, and with the connections leading to the exterior.
Conductor crossovers are constructed from a first "lower" electrically conductive layer, an electrically insulating layer, and a second "upper" electrically conductive layer or layer sequence. Viewed perpendicularly to the substrate surface, crossing points are obtained for two conductors electrically insulated from one another which are known as conductor crossovers. The latter can, as is known, be realized in different techniques.
The TaAl double layer technique, known from U.S. Pat. No. 3,949,275 (German OS No. 2,331,586) incorporated herein by reference, permits the manufacture of TaAl resistances and TaAl-oxide capacitors on a substrate. Through the introduction of a sandwhich-dielectric consisting of TaAl-oxide and SiO.sub.2 of specified layer thickness, the temperature coefficients of resistances and capacitors can be compensated such as is described in German OS No. 2,506,065 incorporated herein by reference. A manufacturing method for this purpose is described in the German patent application No. P 26 53 814.7 incorporated herein by reference.